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Kun-Hsien Lin

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2006
4EEKun-Hsien Lin, Ming-Dou Ker: Electrostatic discharge protection scheme without leakage current path for CMOS IC operating in power-down-mode condition on a system board. Microelectronics Reliability 46(2-4): 301-310 (2006)
2005
3EEKun-Hsien Lin, Ming-Dou Ker: ESD protection design for I/O cells in sub-130-nm CMOS technology with embedded SCR structure. ISCAS (2) 2005: 1182-1185
2EEMing-Dou Ker, Kun-Hsien Lin, Che-Hao Chuang: MOS-Bounded Diodes for On-Chip ESD Protection in Deep Submicron CMOS Process. IEICE Transactions 88-C(3): 429-436 (2005)
2004
1 Ming-Dou Ker, Kun-Hsien Lin: ESD protection design for IC with power-down-mode operation. ISCAS (2) 2004: 717-720

Coauthor Index

1Che-Hao Chuang [2]
2Ming-Dou Ker [1] [2] [3] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)