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2005 | ||
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3 | EE | Shyh-Jye Jou, Chih-Hsien Lin, Yen-I Wang: A 12.5 Gbps CMOS input sampler for serial link receiver front end. ISCAS (2) 2005: 1055-1058 |
2 | EE | Chih-Hsien Lin, Chang-Hsiao Tsai, Chih-Ning Chen, Shyh-Jye Jou: Multi-Gigabit Pre-Emphasis Design and Analysis for Serial Link. IEICE Transactions 88-C(10): 2009-2019 (2005) |
2004 | ||
1 | EE | Chih-Hsien Lin, Chang-Hsiao Tsai, Chih-Ning Chen, Shyh-Jye Jou: 4/2 PAM serial link transmitter with tunable pre-emphasis. ISCAS (1) 2004: 952-958 |
1 | Chih-Ning Chen | [1] [2] |
2 | Shyh-Jye Jou | [1] [2] [3] |
3 | Chang-Hsiao Tsai | [1] [2] |
4 | Yen-I Wang | [3] |