K. K. Lee

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2002

4 EE K. K. Lee, D. F. Wong: Incremental reconfiguration of multi-FPGA systems. FPGA 2002: 206-213

2001

3 EE K. K. Lee, D. F. Wong: LRoute: a delay minimal router for hierarchical CPLDs. FPGA 2001: 12-20

1999

2 EE K. K. Lee, D. F. Wong: An Exact Tree-Based Structural Technology Mapping Algorithm for Configurable Logic Blocks in FPGAs. ICCD 1999: 216-221

1998

1 EE Madhukar R. Korupolu, K. K. Lee, D. F. Wong: Exact Tree-based FPGA Technology Mapping for Logic Blocks with Independent LUTs. DAC 1998: 708-711

2002
4	EE	K. K. Lee, D. F. Wong: Incremental reconfiguration of multi-FPGA systems. FPGA 2002: 206-213
2001
3	EE	K. K. Lee, D. F. Wong: LRoute: a delay minimal router for hierarchical CPLDs. FPGA 2001: 12-20
1999
2	EE	K. K. Lee, D. F. Wong: An Exact Tree-Based Structural Technology Mapping Algorithm for Configurable Logic Blocks in FPGAs. ICCD 1999: 216-221
1998
1	EE	Madhukar R. Korupolu, K. K. Lee, D. F. Wong: Exact Tree-based FPGA Technology Mapping for Logic Blocks with Independent LUTs. DAC 1998: 708-711

Coauthor Index

1 Madhukar R. Korupolu [1]

2 Martin D. F. Wong (D. F. Wong) [1] [2] [3] [4]

1	Madhukar R. Korupolu	[1]
2	Martin D. F. Wong (D. F. Wong)	[1] [2] [3] [4]