Junghyup Lee
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2006
1
EE
Youngsoo Shin
, Junghyup Lee: Power Analysis of VLSI Interconnect with RLC Tree Models and Model Reduction.
Journal of Circuits, Systems, and Computers 15
(3): 399-408 (2006)
Coauthor
Index
1
Youngsoo Shin
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1
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Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)