| 2008 |
|---|
| 8 | EE | Sangyeun Cho,
Socrates Demetriades,
Shayne Evans,
Lei Jin,
Hyunjin Lee,
Kiyeon Lee,
Michael Moeng:
TPTS: A Novel Framework for Very Fast Manycore Processor Architecture Simulation.
ICPP 2008: 446-453 |
| 2007 |
|---|
| 7 | EE | Hyunjin Lee,
Sangyeun Cho,
Bruce R. Childers:
Exploring the interplay of yield, area, and performance in processor caches.
ICCD 2007: 216-223 |
| 6 | EE | Hyunjin Lee,
Sangyeun Cho,
Bruce R. Childers:
Performance of Graceful Degradation for Cache Faults.
ISVLSI 2007: 409-415 |
| 2006 |
|---|
| 5 | EE | Wonik Park,
Wonil Kim,
Sanggil Kang,
Hyunjin Lee,
Young-Kuk Kim:
Personalized Digital E-library Service Using Users' Profile Information.
ECDL 2006: 528-531 |
| 4 | EE | Lei Jin,
Hyunjin Lee,
Sangyeun Cho:
A flexible data to L2 cache mapping approach for future multicore processors.
Memory System Performance and Correctness 2006: 92-101 |
| 3 | EE | Tae-Chang Jee,
Hyunjin Lee,
Yillbyung Lee:
Shrinking Number of Clusters by Multi-Dimensional Scaling.
SWAP 2006 |
| 2 | EE | Kuk-Hwan Kim,
Hyunjin Lee,
Yang-Kyu Choi:
Novel Structures for a 2-Bit per Cell of Nonvolatile Memory Using an Asymmetric Double Gate.
IEICE Transactions 89-C(5): 578-584 (2006) |
| 2002 |
|---|
| 1 | EE | Hyunjin Lee,
Hyeyoung Park,
Yillbyung Lee:
Network Optimization through Learning and Pruning in Neuromanifold.
PRICAI 2002: 169-177 |
