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Hyuk-Jun Lee

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2008
6EEHyuk-Jun Lee, Eui-Young Chung: Scalable QoS-Aware Memory Controller for High-Bandwidth Packet Memory. IEEE Trans. VLSI Syst. 16(3): 289-301 (2008)
2007
5EEMinje Jun, Kwanhu Bang, Hyuk-Jun Lee, Naehyuck Chang, Eui-Young Chung: Slack-based Bus Arbitration Scheme for Soft Real-time Constrained Embedded Systems. ASP-DAC 2007: 159-164
4EEEui-Young Chung, Hyuk-Jun Lee, Sung Woo Chung: Scenario-Aware Bus Functional Modeling for Architecture-Level Performance Analysis. IEICE Transactions 90-A(4): 875-878 (2007)
3EEMinje Jun, Kwanhu Bang, Hyuk-Jun Lee, Eui-Young Chung: Latency-Aware Bus Arbitration for Real-Time Embedded Systems. IEICE Transactions 90-D(3): 676-679 (2007)
2000
2EEHyuk-Jun Lee, Michael J. Flynn: Coarse-grained carry architecture for FPGA (poster abstract). FPGA 2000: 217
1 Hyuk-Jun Lee, Albert A. Liddicoat, Michael J. Flynn: Exploiting Parallelism and Data Locality of Systolic Array Applications using Multi-Ported FPGA. PDPTA 2000

Coauthor Index

1Kwanhu Bang [3] [5]
2Naehyuck Chang [5]
3Eui-Young Chung [3] [4] [5] [6]
4Sung Woo Chung [4]
5Michael J. Flynn [1] [2]
6Minje Jun [3] [5]
7Albert A. Liddicoat [1]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)