2006 | ||
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1 | EE | Noriaki Oda, Hiroyuki Kunishima, Takashi Kyouno, Kazuhiro Takeda, Tomoaki Tanaka, Toshiyuki Takewaki, Masahiro Ikeda: Chip-Level Performance Improvement Using Triple Damascene Wiring Design Concept for the 0.13 µm CMOS Generation and Beyond. IEICE Transactions 89-C(11): 1544-1550 (2006) |
1 | Masahiro Ikeda | [1] |
2 | Hiroyuki Kunishima | [1] |
3 | Noriaki Oda | [1] |
4 | Kazuhiro Takeda | [1] |
5 | Toshiyuki Takewaki | [1] |
6 | Tomoaki Tanaka | [1] |