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T. Kubo

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2004
2EET. Kubo: Optimal memoryless regulator of systems with time-varying delay. ICARCV 2004: 1853-1858
1986
1EET. Shinsha, T. Kubo, Y. Sakataya, J. Koshishita, K. Ishihara: Incremental logic synthesis through gate logic structure identification. DAC 1986: 391-397

Coauthor Index

1K. Ishihara [1]
2J. Koshishita [1]
3Y. Sakataya [1]
4T. Shinsha [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)