2004 | ||
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2 | EE | T. Kubo: Optimal memoryless regulator of systems with time-varying delay. ICARCV 2004: 1853-1858 |
1986 | ||
1 | EE | T. Shinsha, T. Kubo, Y. Sakataya, J. Koshishita, K. Ishihara: Incremental logic synthesis through gate logic structure identification. DAC 1986: 391-397 |
1 | K. Ishihara | [1] |
2 | J. Koshishita | [1] |
3 | Y. Sakataya | [1] |
4 | T. Shinsha | [1] |