| |
| 2007 | ||
|---|---|---|
| 3 | EE | M. A. Ochoa-Montiel, Bashir M. Al-Hashimi, P. Kollig: Exploiting Power-Area Tradeoffs in Behavioural Synthesis through clock and operations throughput selection. ASP-DAC 2007: 517-522 |
| 2005 | ||
| 2 | EE | M. A. Ochoa-Montiel, Bashir M. Al-Hashimi, P. Kollig: Impact of multicycled scheduling on power-area tradeoffs in behavioural synthesis. ISCAS (4) 2005: 4163-4166 |
| 1999 | ||
| 1 | EE | P. Kollig, Bashir M. Al-Hashimi: Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs. FPGA 1999: 227-234 |
| 1 | Bashir M. Al-Hashimi | [1] [2] [3] |
| 2 | M. A. Ochoa-Montiel | [2] [3] |