2000 | ||
---|---|---|
2 | EE | Hisaaki Katagiri, Keiichi Yasumoto, Akira Kitajima, Teruo Higashino, Kenichi Taniguchi: Hardware implementation of communication protocols modeled by concurrent EFSMs with multi-way synchronization. DAC 2000: 762-767 |
1 | Hisaaki Katagiri, Masayuki Kirimura, Keiichi Yasumoto, Teruo Higashino, Kenichi Taniguchi: Hardware implementation of Concurrent Periodic EFSM's. FORTE 2000: 285-300 |
1 | Teruo Higashino | [1] [2] |
2 | Masayuki Kirimura | [1] |
3 | Akira Kitajima | [2] |
4 | Kenichi Taniguchi | [1] [2] |
5 | Keiichi Yasumoto | [1] [2] |