| |
| 2008 | ||
|---|---|---|
| 1 | Rohit Sharma, Vivek Kumar Sehgal, Nitin Chanderwal, Saumya Rawat, Vinodini Kapoor, Sonia Chadha: Time-Domain Analysis of VLSI Interconnects Considering Oscillatory Inputs. CDES 2008: 57-60 | |
| 1 | Sonia Chadha | [1] |
| 2 | Nitin Chanderwal | [1] |
| 3 | Saumya Rawat | [1] |
| 4 | Vivek Kumar Sehgal | [1] |
| 5 | Rohit Sharma | [1] |