| 2007 |
|---|
| 7 | EE | Se-Hyeon Kang,
In-Cheol Park:
High Speed Sphere Decoding Based on Vertically Incremental Computation.
ISCAS 2007: 665-668 |
| 6 | EE | Se-Hyeon Kang,
In-Cheol Park:
Fast and Area-Efficient Sphere Decoding Using Look-Ahead Search.
VTC Spring 2007: 2384-2388 |
| 2005 |
|---|
| 5 | EE | In-Cheol Park,
Se-Hyeon Kang:
Scheduling algorithm for partially parallel architecture of LDPC decoder by matrix permutation.
ISCAS (6) 2005: 5778-5781 |
| 2004 |
|---|
| 4 | | Se-Hyeon Kang,
In-Cheol Park:
Memory-based low density parity check code decoder architecture using loosely coupled two data-flows.
ISCAS (2) 2004: 397-400 |
| 2003 |
|---|
| 3 | EE | In-Cheol Park,
Se-Hyeon Kang,
Yongseok Yi:
Fast Cycle-accurate Behavioral Simulation for Pipelined Processors Using Early Pipeline Evaluation.
ICCAD 2003: 138-141 |
| 2002 |
|---|
| 2 | EE | Myoung-Cheol Shin,
Seong-Il Park,
Sung-Won Lee,
Se-Hyeon Kang,
In-Cheol Park:
Area-efficient digital baseband module for Bluetooth wireless communications.
ISCAS (5) 2002: 729-732 |
| 2001 |
|---|
| 1 | | Myoung-Cheol Shin,
Se-Hyeon Kang,
In-Cheol Park:
An Area-Efficient Iterative Modified-Booth Multiplier Based on Self-Timed Clocking.
ICCD 2001: 511-512 |
