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Milind B. Kamble

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1999
3EEKanad Ghose, Milind B. Kamble: Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation. ISLPED 1999: 70-75
1997
2EEMilind B. Kamble, Kanad Ghose: Analytical energy dissipation models for low-power caches. ISLPED 1997: 143-148
1EEMilind B. Kamble, Kanad Ghose: Energy-Efficiency of VLSI Caches: A Comparative Study. VLSI Design 1997: 261-267

Coauthor Index

1Kanad Ghose [1] [2] [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)