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| 2007 | ||
|---|---|---|
| 2 | EE | Yung-Chuan Jiang, Jhing-Fa Wang: Temporal Partitioning Data Flow Graphs for Dynamically Reconfigurable Computing. IEEE Trans. VLSI Syst. 15(12): 1351-1361 (2007) |
| 2005 | ||
| 1 | EE | Yen-Tai Lai, Yung-Chuan Jiang, Hong-Ming Chu: BDD decomposition for mixed CMOS/PTL logic circuit synthesis. ISCAS (6) 2005: 5649-5652 |
| 1 | Hong-Ming Chu | [1] |
| 2 | Yen-Tai Lai | [1] |
| 3 | Jhing-Fa Wang | [2] |