| |
| 1996 | ||
|---|---|---|
| 5 | EE | Glenn Jennings, Esther Jennings: A discrete syntax for level-sensitive latched circuits having n clocks and m phases. IEEE Trans. on CAD of Integrated Circuits and Systems 15(1): 111-126 (1996) |
| 1995 | ||
| 4 | EE | Glenn Jennings: Accurate ternary-valued compiled logic simulation of complex logic networks by OTDD composition. Annual Simulation Symposium 1995: 303-310 |
| 3 | EE | Glenn Jennings: Symbolic incompletely specified functions for correct evaluation in the presence of indeterminate input values. HICSS (1) 1995: 23-31 |
| 1992 | ||
| 2 | Glenn Jennings: A Functional Execution Model for a Non-Dataflow Tagged Token Architecture. IPPS 1992: 496-501 | |
| 1991 | ||
| 1 | EE | Glenn Jennings: A case against event-driven simulation for digital system design. Annual Simulation Symposium 1991: 170-176 |
| 1 | Esther Jennings | [5] |