| |
| 1999 | ||
|---|---|---|
| 3 | P. K. Singh, Sriram Jayasimha: A Low-Complexity, Reduced-Power Viterbi Algorithm. VLSI Design 1999: 61-66 | |
| 1998 | ||
| 2 | EE | C. G. Hiremath, Sriram Jayasimha: Improving Concurrency for Cosine-modulated Filterbank Windowing. VLSI Design 1998: 133- |
| 1994 | ||
| 1 | Truong Q. Nguyen, Sriram Jayasimha: Polarity-Coincidence Filter Banks and Nondestructive Evaluation. ISCAS 1994: 497-500 | |
| 1 | C. G. Hiremath | [2] |
| 2 | Truong Q. Nguyen | [1] |
| 3 | P. K. Singh | [3] |