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Hirisave S. Jamadagni

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2007
2EEB. K. S. V. L. Varaprasad, Lalit M. Patnaik, Hirisave S. Jamadagni, V. K. Agrawal: A New ATPG Technique (ExpoTan) for Testing Analog Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 189-196 (2007)
2004
1EEB. K. S. V. L. Varaprasad, Lalit M. Patnaik, Hirisave S. Jamadagni, V. K. Agrawal: A new ATPG technique (MultiDetect) for testing of analog macros in mixed-signal circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 23(2): 273-287 (2004)

Coauthor Index

1V. K. Agrawal [1] [2]
2Lalit M. Patnaik [1] [2]
3B. K. S. V. L. Varaprasad [1] [2]

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