| 2008 |
|---|
| 14 | EE | Koji Nakano,
Yasuaki Ito:
Processor, Assembler, and Compiler Design Education Using an FPGA.
ICPADS 2008: 723-728 |
| 13 | EE | Yasuaki Ito,
Koji Nakano:
Component labeling for k-concave binary images using an FPGA.
IPDPS 2008: 1-8 |
| 12 | EE | Yasuaki Ito,
Koji Nakano:
Optimized Component Labeling Algorithm for Using in Medium Sized FPGAs.
PDCAT 2008: 171-176 |
| 11 | EE | Yasuaki Ito,
Koji Nakano:
A New FM Screening Method to Generate Cluster-Dot Binary Images Using the Local Exhaustive Search with FPGA Acceleration.
Int. J. Found. Comput. Sci. 19(6): 1373-1386 (2008) |
| 2007 |
|---|
| 10 | EE | Yasuaki Ito,
Koji Nakano:
Cluster-dot Screening by Local Exhaustive Search with Hardware Accelaration.
IPDPS 2007: 1-8 |
| 9 | EE | Yasuaki Ito,
Koji Nakano,
Youhei Yamagishi:
Efficient Hardware Algorithms for n Choose k Counters Using the Bitonic Merger.
Int. J. Found. Comput. Sci. 18(3): 517-528 (2007) |
| 2006 |
|---|
| 8 | EE | Yasuaki Ito,
Koji Nakano,
Youhei Yamagishi:
Efficient hardware algorithms for n choose k counters.
IPDPS 2006 |
| 7 | EE | Jacir Luiz Bordim,
Yasuaki Ito,
Koji Nakano:
Randomized Leader Election Protocols in Noisy Radio Networks with a Single Transceiver.
ISPA 2006: 246-256 |
| 6 | EE | Jacir Luiz Bordim,
Yasuaki Ito,
Koji Nakano:
An Energy Efficient Leader Election Protocol for Radio Network with a Single Transceiver.
IEICE Transactions 89-A(5): 1355-1361 (2006) |
| 2005 |
|---|
| 5 | EE | Yasuaki Ito,
Koji Nakano:
FM Screening By The Local Exhaustive Search, With Hardware Acceleration.
Int. J. Found. Comput. Sci. 16(1): 89-104 (2005) |
| 2004 |
|---|
| 4 | EE | Yasuaki Ito,
Koji Nakano:
FM Screening by the Local Exhaustive Search, with Hardware Acceleration.
IPDPS 2004 |
| 3 | EE | Jacir Luiz Bordim,
Oscar H. Ibarra,
Yasuaki Ito,
Koji Nakano:
Instance-Specific Solutions For Accelerating The Cky Parsing Of Large Context-Free Grammars.
Int. J. Found. Comput. Sci. 15(2): 403-415 (2004) |
| 2003 |
|---|
| 2 | | Jacir Luiz Bordim,
Yasuaki Ito,
Koji Nakano:
Instance-Specific Solutions to Accelerate the CKY Parsing.
Engineering of Reconfigurable Systems and Algorithms 2003: 72-80 |
| 2002 |
|---|
| 1 | EE | Jacir Luiz Bordim,
Yasuaki Ito,
Koji Nakano:
Accelerating the CKY Parsing Using FPGAs.
HiPC 2002: 41-51 |
