Jinsong Hou

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1999

1 EE Jinsong Hou, Zeyi Wang, Xianlong Hong: The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance. ASP-DAC 1999: 93-

1999
1	EE	Jinsong Hou, Zeyi Wang, Xianlong Hong: The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance. ASP-DAC 1999: 93-

Coauthor Index

1 Xianlong Hong [1]

2 Zeyi Wang [1]