Satchidanand G. Haridas
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2004
1
EE
Satchidanand G. Haridas,
Sotirios G. Ziavras
: FPGA implementation of a Cholesky algorithm for a shared-memory multiprocessor architecture.
Parallel Algorithms Appl. 19
(4): 211-226 (2004)
Coauthor
Index
1
Sotirios G. Ziavras
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1
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Sun May 17 03:24:02 2009 by
Michael Ley
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ley@uni-trier.de
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