| 2000 |
|---|
| 8 | EE | A. Prasad Sistla,
Viktor Gyuris,
E. Allen Emerson:
SMC: a symmetry-based model checker for verification of safety and liveness properties.
ACM Trans. Softw. Eng. Methodol. 9(2): 133-166 (2000) |
| 1999 |
|---|
| 7 | EE | A. Prasad Sistla,
Viktor Gyuris:
Parameterized Verification of Linear Networks using Automata as Invariants.
Formal Asp. Comput. 11(4): 402-425 (1999) |
| 6 | | Viktor Gyuris,
A. Prasad Sistla:
On-the-Fly Model Checking Under Fairness that Exploits Symmetry.
Formal Methods in System Design 15(3): 217-238 (1999) |
| 1997 |
|---|
| 5 | | Viktor Gyuris,
A. Prasad Sistla:
On-the-Fly Model Checking Under Fairness That Exploits Symmetry.
CAV 1997: 232-243 |
| 4 | | A. Prasad Sistla,
L. Miliades,
Viktor Gyuris:
SMC: A Symmetry Based Model Checker for Verification of Liveness Properties.
CAV 1997: 464-467 |
| 3 | EE | Ildikó Sain,
Viktor Gyuris:
Finite Schematizable Algebraic Logic.
Logic Journal of the IGPL 5(5): (1997) |
| 2 | EE | Viktor Gyuris:
A Short Proof of Representability of Fork Algebras.
Theor. Comput. Sci. 188(1-2): 211-220 (1997) |
| 1995 |
|---|
| 1 | EE | Viktor Gyuris:
A Short Proof of Representability of Fork Algebras.
Logic Journal of the IGPL 3(5): 791-796 (1995) |
