Jerzy W. Greblicki

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2006

2 EE Jerzy W. Greblicki: CAD software for designing of Totally Self Checking Sequential Circuits. DepCoS-RELCOMEX 2006: 289-297

1999

1 EE Jerzy W. Greblicki, Stanislaw J. Piestrak: Design of Totally Self-Checking Code-Disjoint Synchronous Sequential Circuits. EDCC 1999: 251-266

2006
2	EE	Jerzy W. Greblicki: CAD software for designing of Totally Self Checking Sequential Circuits. DepCoS-RELCOMEX 2006: 289-297
1999
1	EE	Jerzy W. Greblicki, Stanislaw J. Piestrak: Design of Totally Self-Checking Code-Disjoint Synchronous Sequential Circuits. EDCC 1999: 251-266

Coauthor Index

1 Stanislaw J. Piestrak [1]