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2007 | ||
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2 | EE | Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig: Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. ICCAD 2007: 370-375 |
2005 | ||
1 | EE | Mike Hutton, David Karchmer, Bryan Archell, Jason Govig: Efficient static timing analysis and applications using edge masks. FPGA 2005: 174-183 |
1 | Bryan Archell | [1] |
2 | Deming Chen | [2] |
3 | Lei Cheng | [2] |
4 | Michael Hutton (Michael D. Hutton, Mike Hutton) | [1] [2] |
5 | David Karchmer | [1] |
6 | Martin D. F. Wong (D. F. Wong) | [2] |