| |
| 2005 | ||
|---|---|---|
| 2 | EE | Haixia Gao, Yintang Yang, Xiaohua Ma, Gang Dong: Testing for Resistive Shorts in FPGA Interconnects. ISQED 2005: 159-163 |
| 1 | EE | Haixia Gao, Yintang Yang, Xiaohua Ma, Gang Dong: Analysis of the Effect of LUT Size on FPGA Area and Delay Using Theoretical Derivations. ISQED 2005: 370-374 |
| 1 | Gang Dong | [1] [2] |
| 2 | Xiaohua Ma | [1] [2] |
| 3 | Yintang Yang | [1] [2] |