Joseph A. Fernando

List of publications from the DBLP Bibliography Server - FAQ

1999

2 EE Joseph A. Fernando, Jack S. N. Jean: Processor array design with FPGA area constraint. IEEE Trans. on CAD of Integrated Circuits and Systems 18(3): 253-264 (1999)

1995

1 EE Joseph A. Fernando, Jack S. N. Jean: Interfacing FPGA/VLSI Processor Arrays. ASAP 1995: 230-237

1999
2	EE	Joseph A. Fernando, Jack S. N. Jean: Processor array design with FPGA area constraint. IEEE Trans. on CAD of Integrated Circuits and Systems 18(3): 253-264 (1999)
1995
1	EE	Joseph A. Fernando, Jack S. N. Jean: Interfacing FPGA/VLSI Processor Arrays. ASAP 1995: 230-237

Coauthor Index