| 2005 |
|---|
| 5 | EE | Pedram Sameni,
Chris Siu,
Shahriar Mirabbasi,
Hormoz Djahanshahi,
Marwa Hamour,
Krzysztof Iniewski,
Jatinder Chana:
Modeling of MOS varactors and characterizing the tuning curve of a 5-6 GHz LC VCO.
ISCAS (5) 2005: 5071-5074 |
| 1999 |
|---|
| 4 | EE | Hormoz Djahanshahi,
C. Andre T. Salama:
Differential 0.35µm CMOS circuits for 622 MHz/933 MHz monolithic clock and data recovery applications.
ISCAS (2) 1999: 93-96 |
| 1998 |
|---|
| 3 | EE | Hormoz Djahanshahi,
Majid Ahmadi,
Graham A. Jullien,
William C. Miller:
A Low-Variation Nonlinear Neuron Circuit.
Journal of Circuits, Systems, and Computers 8(4): 447-451 (1998) |
| 2 | EE | Hormoz Djahanshahi,
Majid Ahmadi,
Graham A. Jullien,
William C. Miller:
Neural Network Integrated Circuits with Single-Block Mixed Signal Arrays.
Journal of Circuits, Systems, and Computers 8(5-6): 589-604 (1998) |
| 1996 |
|---|
| 1 | EE | Hormoz Djahanshahi,
Majid Ahmadi,
Graham A. Jullien,
William C. Miller:
Design and VLSI Implementation of a Unified Synapse-Neuron Architecture.
Great Lakes Symposium on VLSI 1996: 228-233 |
