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| 2000 | ||
|---|---|---|
| 1 | EE | Takahiro Deguchi, Tetsushi Koide, Shin'ichi Wakabayashi: Timing-driven hierarchical global routing with wire-sizing and buffer-insertion for VLSI with multi-routing-layer. ASP-DAC 2000: 99-104 |
| 1 | Tetsushi Koide | [1] |
| 2 | Shin'ichi Wakabayashi | [1] |