F. Cieslok
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2000
1
F. Cieslok,
H. Esau
,
Jürgen Teich
: EXPLORA - Generic Design Space Exploration during Embedded System Synthesis.
DIPES 2000
: 215-226
Coauthor
Index
1
H. Esau
[
1
]
2
Jürgen Teich
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
