| |
| 2008 | ||
|---|---|---|
| 3 | EE | Byung-Soo Choi, Jun-Dong Cho: Partial resolution for redundant operation table. Microprocessors and Microsystems - Embedded Hardware Design 32(2): 79-94 (2008) |
| 2001 | ||
| 2 | EE | Hyeongseok Yu, Byung Wook Kim, Yeon Gon Cho, Jun-Dong Cho, Jea Woo Kim, Hyun Cheol Park, Ki Won Lee: Area-efficient and reusable VLSI architecture of decision feedback equalizer for QAM modern. ASP-DAC 2001: 404-408 |
| 1995 | ||
| 1 | EE | Jun-Dong Cho, M. Sarrafzadeh: A buffer distribution algorithm for high-performance clock net optimization. IEEE Trans. VLSI Syst. 3(1): 84-98 (1995) |
| 1 | Yeon Gon Cho | [2] |
| 2 | Byung-Soo Choi | [3] |
| 3 | Byung Wook Kim | [2] |
| 4 | Jea Woo Kim | [2] |
| 5 | Ki Won Lee | [2] |
| 6 | Hyun Cheol Park | [2] |
| 7 | M. Sarrafzadeh | [1] |
| 8 | Hyeongseok Yu | [2] |