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Po-Xun Chiu

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2001
1EEPo-Xun Chiu, Yu-Chung Lin, Yi-Ling Hsieh, Tsai-Ming Hsieh: Low power driven re-synthesis algorithm for heterogeneous FPGA under delay constraint. ISCAS (5) 2001: 519-522

Coauthor Index

1Tsai-Ming Hsieh [1]
2Yi-Ling Hsieh [1]
3Yu-Chung Lin [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)