| |
| 1984 | ||
|---|---|---|
| 1 | EE | F. J. Hill, Zainalabedin Navabi, C. H. Chiang, Duan-Ping Chen, M. Masud: Hardware Compilation from an RTL to a Storage Logic Array Target. IEEE Trans. on CAD of Integrated Circuits and Systems 3(3): 208-217 (1984) |
| 1 | Duan-Ping Chen | [1] |
| 2 | F. J. Hill | [1] |
| 3 | M. Masud | [1] |
| 4 | Zainalabedin Navabi | [1] |