| 2007 |
|---|
| 5 | EE | Jaw-Wei Chi,
Chia-Lin Yang,
Yi-Jung Chen,
Jian-Jia Chen:
Cache leakage control mechanism for hard real-time systems.
CASES 2007: 248-256 |
| 4 | EE | Wei-Hsuan Hung,
Yi-Jung Chen,
Chia-Lin Yang,
Yen-Sheng Chang,
Alan P. Su:
An architectural co-synthesis algorithm for energy-aware network-on-chip design.
SAC 2007: 680-684 |
| 3 | EE | Yi-Jung Chen,
Dyi-Rong Duh,
Yunghsian Sam Han:
Improved Modulo (2n+1) Multiplier for IDEA.
J. Inf. Sci. Eng. 23(3): 911-923 (2007) |
| 2006 |
|---|
| 2 | EE | Chia-Lin Yang,
Shun-Ying Wang,
Yi-Jung Chen:
Branch Behavior Characterization for Multimedia Applications.
Asia-Pacific Computer Systems Architecture Conference 2006: 523-530 |
| 2004 |
|---|
| 1 | | Yi-Jung Chen,
Dyi-Rong Duh,
Hun Yunghsiang Sam Han:
A New Modulo (2n+1) Multiplier for IDEA.
Security and Management 2004: 318-324 |
