2006 | ||
---|---|---|
1 | EE | Rajeev Kumar, Rahul Chaudhry, Dipankar Das, Vibha Rathi, S. K. Panda, P. P. Chakrabarti: SystemC Modeling and Validation of A RISC Processor System. FDL 2006: 189-197 |
1 | P. P. Chakrabarti (Partha Pratim Chakrabarti) | [1] |
2 | Dipankar Das | [1] |
3 | Rajeev Kumar | [1] |
4 | S. K. Panda | [1] |
5 | Vibha Rathi | [1] |