| 2008 |
|---|
| 9 | EE | Sergio Callegari:
Introducing Complex Oscillation Based Test: an application example targeting Analog to Digital Converters.
ISCAS 2008: 320-323 |
| 2007 |
|---|
| 8 | EE | Sergio Callegari,
Gianluca Setti:
ADCs, Chaos and TRNGs: a Generalized View Exploiting Markov Chain Lumpability Properties.
ISCAS 2007: 213-216 |
| 2006 |
|---|
| 7 | EE | Pietro Savazzi,
Paolo Gamba,
Sergio Callegari:
An All-Digital Clock Recovery Architecture for the BRAN Hiperaccess Uplink Receiver.
VTC Spring 2006: 2206-2210 |
| 2005 |
|---|
| 6 | EE | Sergio Callegari,
Riccardo Rovatti,
Gianluca Setti:
Embeddable ADC-based true random number generator for cryptographic applications exploiting nonlinear signal processing and chaos.
IEEE Transactions on Signal Processing 53(2-2): 793-805 (2005) |
| 2004 |
|---|
| 5 | | Stefano Poli,
Sergio Callegari,
Riccardo Rovatti,
Gianluca Setti:
Post-processing of data generated by a chaotic pipelined ADC for the robust generation of perfectly random bitstreams.
ISCAS (4) 2004: 585-588 |
| 2002 |
|---|
| 4 | EE | Sergio Callegari,
Riccardo Rovatti,
Gianluca Setti:
Folded sums of chaotic trajectories distribute uniformly.
ISCAS (3) 2002: 891-894 |
| 3 | EE | Riccardo Rovatti,
Sergio Callegari,
Gianluca Setti:
On the correlation of non-jittered and chaotically-jittered PWM signals carrying maximum information.
ISCAS (3) 2002: 895-898 |
| 2001 |
|---|
| 2 | EE | Sergio Callegari,
M. Dondini,
Gianluca Setti:
Adaptive median thresholding for the generation of high-data-rate random-like unpredictable binary sequences with chaos.
ISCAS (3) 2001: 221-224 |
| 1999 |
|---|
| 1 | EE | Sergio Callegari,
Gianluca Setti:
Improved bandwidth, low voltage log domain building blocks.
ISCAS (2) 1999: 677-680 |
