Deepak Boppana
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2004
1
EE
Deepak Boppana,
Kully Dhanoa
,
Jesse Kempa
: FPGA based Embedded Processing Architecture for the QRD-RLS Algorithm.
FCCM 2004
: 330-331
Coauthor
Index
1
Kully Dhanoa
[
1
]
2
Jesse Kempa
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
