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| 1997 | ||
|---|---|---|
| 3 | J. Blatný, Zdenek Kotásek, Jan Hlavicka: RT Level Test Scheduling. Computers and Artificial Intelligence 16(1): (1997) | |
| 1995 | ||
| 2 | J. Blatný, D. Bartonek: The Hardware Accelerator SFDL/SCL. Computers and Artificial Intelligence 14(2): (1995) | |
| 1 | J. Blatný, Zdenek Kotásek: I-Path Analysis. Computers and Artificial Intelligence 14(5): (1995) | |
| 1 | D. Bartonek | [2] |
| 2 | Jan Hlavicka | [3] |
| 3 | Zdenek Kotásek | [1] [3] |