| 2009 |
| 6 | EE | Muthu Manikandan Baskaran,
Nagavijayalakshmi Vydyanathan,
Uday Bondhugula,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors.
PPOPP 2009: 219-228 |
| 2008 |
| 5 | EE | Uday Bondhugula,
Muthu Manikandan Baskaran,
Sriram Krishnamoorthy,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
Automatic Transformations for Communication-Minimized Parallelization and Locality Optimization in the Polyhedral Model.
CC 2008: 132-146 |
| 4 | EE | Muthu Manikandan Baskaran,
Uday Bondhugula,
Sriram Krishnamoorthy,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
A compiler framework for optimization of affine loop nests for gpgpus.
ICS 2008: 225-234 |
| 3 | EE | Uday Bondhugula,
Muthu Manikandan Baskaran,
Albert Hartono,
Sriram Krishnamoorthy,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
Towards effective automatic parallelization for multicore systems.
IPDPS 2008: 1-5 |
| 2 | EE | Muthu Manikandan Baskaran,
Uday Bondhugula,
Sriram Krishnamoorthy,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
Automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memories.
PPOPP 2008: 1-10 |
| 2007 |
| 1 | EE | Sriram Krishnamoorthy,
Muthu Manikandan Baskaran,
Uday Bondhugula,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
Effective automatic parallelization of stencil computations.
PLDI 2007: 235-244 |