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| 2006 | ||
|---|---|---|
| 1 | EE | Junjun Li, S. Joshi, R. Barnes, E. Rosenbaum: Compact modeling of on-chip ESD protection devices using Verilog-A. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1047-1063 (2006) |
| 1 | S. Joshi | [1] |
| 2 | Junjun Li | [1] |
| 3 | E. Rosenbaum | [1] |