2001 | ||
---|---|---|
2 | EE | Y. Bajot, H. Mehrez: Customizable DSP architecture for ASIP core design. ISCAS (4) 2001: 302-305 |
1 | EE | Y. Dumonteix, Y. Bajot, H. Mehrez: A fast and low-power distance computation unit dedicated to neural networks, based on redundant arithmetic. ISCAS (4) 2001: 878-881 |
1 | Y. Dumonteix | [1] |
2 | H. Mehrez | [1] [2] |