| |
| 2002 | ||
|---|---|---|
| 3 | EE | H. Yoshida, H. Yamaoka, M. Ikeda, K. Asada: Logic synthesis for PLA with 2-input logic elements. ISCAS (3) 2002: 373-376 |
| 1994 | ||
| 2 | J. Akita, K. Asada: A Method for Reducing Power Consumption of CMOS Logic Based on Signal Transition Probability. EDAC-ETC-EUROASIC 1994: 420-424 | |
| 1986 | ||
| 1 | K. Asada: Advanced Microelectronics as a Foundation for Future Computers (Panel). IFIP Congress 1986: 79-80 | |
| 1 | J. Akita | [2] |
| 2 | M. Ikeda | [3] |
| 3 | H. Yamaoka | [3] |
| 4 | H. Yoshida | [3] |