| |
| 2006 | ||
|---|---|---|
| 3 | EE | Kaiping Zeng, Sorin A. Huss: Architecture refinements by code refactoring of behavioral VHDL-AMS models. ISCAS 2006 |
| 2 | EE | Kaiping Zeng, Sorin A. Huss: Structure Synthesis of Analog and Mixed-Signal Circuits using Partition Techniques. ISQED 2006: 225-230 |
| 2005 | ||
| 1 | EE | Kaiping Zeng, Sorin A. Huss: RAMS: A VHDL-AMS Code Refactoring Tool Supporting High Level Analog Synthesis. ISVLSI 2005: 266-267 |
| 1 | Sorin A. Huss (Sorin Alexander Huss) | [1] [2] [3] |