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Chun-Chang Yu

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2007
2EEChe-Wei Lin, Jeen-Shing Wang, Chun-Chang Yu, Ting-Yu Chen: Synchronous Pipeline Circuit Design for an Adaptive Neuro-fuzzy Network. ICIC (2) 2007: 164-173
1EETzu-Ping Kao, Chun-Chang Yu, Ting-Yu Chen, Jeen-Shing Wang: Hardware Design of an Adaptive Neuro-fuzzy Network with On-Chip Learning Capability. ISNN (2) 2007: 336-345

Coauthor Index

1Ting-Yu Chen [1] [2]
2Tzu-Ping Kao [1]
3Che-Wei Lin [2]
4Jeen-Shing Wang [1] [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)