| |
| 2007 | ||
|---|---|---|
| 2 | EE | Che-Wei Lin, Jeen-Shing Wang, Chun-Chang Yu, Ting-Yu Chen: Synchronous Pipeline Circuit Design for an Adaptive Neuro-fuzzy Network. ICIC (2) 2007: 164-173 |
| 1 | EE | Tzu-Ping Kao, Chun-Chang Yu, Ting-Yu Chen, Jeen-Shing Wang: Hardware Design of an Adaptive Neuro-fuzzy Network with On-Chip Learning Capability. ISNN (2) 2007: 336-345 |
| 1 | Ting-Yu Chen | [1] [2] |
| 2 | Tzu-Ping Kao | [1] |
| 3 | Che-Wei Lin | [2] |
| 4 | Jeen-Shing Wang | [1] [2] |