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Chao Yan

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2008
3EEChao Yan, Mark R. Greenstreet: Faster projection based methods for circuit level verification. ASP-DAC 2008: 410-415
2007
2EEChao Yan, Mark R. Greenstreet: Circuit Level Verification of a High-Speed Toggle. FMCAD 2007: 199-206
2004
1EEChao Yan, Guo-Liang Chen, Yi-Fei Shen: Outleir Analysis for Gene Expression Data. J. Comput. Sci. Technol. 19(1): 13-21 (2004)

Coauthor Index

1Guo-Liang Chen [1]
2Mark R. Greenstreet [2] [3]
3Yi-Fei Shen [1]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)