| |
| 2006 | ||
|---|---|---|
| 4 | EE | N. Wong, V. Balakrishnan: Multi-shift quadratic alternating direction implicit iteration for high-speed positive-real balanced truncation. DAC 2006: 257-260 |
| 3 | EE | N. Wong, C. K. Chu: A fast passivity test for descriptor systems via structure-preserving transformations of Skew-Hamiltonian/Hamiltonian matrix pencils. DAC 2006: 261-266 |
| 2 | EE | W. T. Cheung, N. Wong: Power optimization in a repeater-inserted interconnect via geometric programming. ISLPED 2006: 226-231 |
| 1 | EE | N. Wong, V. Balakrishnan, C.-K. Koh, T.-S. Ng: Two Algorithms for Fast and Accurate Passivity-Preserving Model Order Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2062-2075 (2006) |
| 1 | V. Balakrishnan | [1] [4] |
| 2 | W. T. Cheung | [2] |
| 3 | C. K. Chu | [3] |
| 4 | C.-K. Koh | [1] |
| 5 | T.-S. Ng | [1] |