| 2008 |
|---|
| 8 | EE | Won-Young Jung,
Hyungon Kim,
Yong-Ju Kim,
Jae-Kyung Wee:
Novel Method of Interconnect Worstcase Establishment with Statistically-Based Approaches.
IEICE Transactions 91-A(4): 1177-1184 (2008) |
| 2007 |
|---|
| 7 | EE | Ji-Hoon Lim,
Jong-Chan Ha,
Won-Young Jung,
Yong-Ju Kim,
Jae-Kyung Wee:
A Novel High-Speed and Low-Voltage CMOS Level-Up/Down Shifter Design for Multiple-Power and Multiple-Clock Domain Chips.
IEICE Transactions 90-C(3): 644-648 (2007) |
| 2006 |
|---|
| 6 | EE | Yong-Ju Kim,
Won-Young Jung,
Jae-Kyung Wee:
Fast and Accurate Power Bus Designer for Multi-Layers High-Speed Digital Boards.
IEICE Transactions 89-C(7): 1097-1105 (2006) |
| 2005 |
|---|
| 5 | EE | Gang-Hoon Seo,
Won-Yong Jung,
Seongsoo Lee,
Jae-Kyung Wee:
Pipelined Bidirectional Bus Architecture for Embedded Multimedia SoCs.
EUC 2005: 350-359 |
| 4 | EE | Yong-Ju Jang,
Yoan Shin,
Min-Cheol Hong,
Jae-Kyung Wee,
Seongsoo Lee:
Low-Power 32bit×32bit Multiplier Design with Pipelined Block-Wise Shutdown.
HiPC 2005: 398-406 |
| 3 | EE | Gyu-Sung Yeon,
Chi-Hun Jun,
Tae-Jin Hwang,
Seongsoo Lee,
Jae-Kyung Wee:
Low-Power MPEG-4 Motion Estimator Design for Deep Sub-Micron Multimedia SoC.
KES (3) 2005: 449-455 |
| 2 | EE | Seongsoo Lee,
Min-Cheol Hong,
Jae-Kyung Wee:
Low-Hardware-Cost Motion Estimation with Large Search Range for VLSI Multimedia Processors.
IEICE Transactions 88-D(9): 2177-2182 (2005) |
| 2004 |
|---|
| 1 | | Gyu-Sung Yeon,
Chi-Hun Jun,
Tae-Jin Hwang,
Seongsoo Lee,
Jae-Kyung Wee:
Low power motion estimator architecture with leakage power reduction in deep sub-micron SoC.
Circuits, Signals, and Systems 2004: 85-89 |
