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2008 | ||
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3 | Anatol Slissenko, Pavel Vasilyev: Simulation of Timed Abstract State Machines with Predicate Logic Model-Checking. J. UCS 14(12): 1984-2006 (2008) | |
2006 | ||
2 | EE | Pavel Vasilyev: Simulator for Real-Time Abstract State Machines. FORMATS 2006: 337-351 |
1 | Pavel Vasilyev: Simulator for Real-Time Abstract State Machines. MSVVEIS 2006: 202-205 |
1 | Anatol Slissenko | [3] |