Hirokazu Tohya
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2007
1
EE
Hirokazu Tohya,
Noritaka Toya
: A Novel Design Methodology of the On-Chip Power Distribution Network Enhancing the Performance and Suppressing EMI of the SoC.
ISCAS 2007
: 889-892
Coauthor
Index
1
Noritaka Toya
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Sun May 17 03:24:02 2009 by
Michael Ley
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ley@uni-trier.de
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