| 2008 |
|---|
| 10 | EE | Magdalena Kacprzak,
Wojciech Nabialek,
Artur Niewiadomski,
Wojciech Penczek,
Agata Pólrola,
Maciej Szreter,
Bozena Wozna,
Andrzej Zbrzezny:
VerICS 2007 - a Model Checker for Knowledge and Real-Time.
Fundam. Inform. 85(1-4): 313-328 (2008) |
| 9 | EE | Wojciech Penczek,
Maciej Szreter:
SAT-based Unbounded Model Checking of Timed Automata.
Fundam. Inform. 85(1-4): 425-440 (2008) |
| 2007 |
|---|
| 8 | EE | Wojciech Penczek,
Maciej Szreter:
SAT-based Unbounded Model Checking of Timed Automata.
ACSD 2007: 236-237 |
| 2006 |
|---|
| 7 | EE | Magdalena Kacprzak,
Alessio Lomuscio,
Artur Niewiadomski,
Wojciech Penczek,
Franco Raimondi,
Maciej Szreter:
Comparing BDD and SAT Based Techniques for Model Checking Chaum's Dining Cryptographers Protocol.
Fundam. Inform. 72(1-3): 215-234 (2006) |
| 2005 |
|---|
| 6 | EE | Maciej Szreter:
Selective Search in Bounded Model Checking of Reachability Properties.
ATVA 2005: 159-173 |
| 2004 |
|---|
| 5 | EE | Magdalena Kacprzak,
Alessio Lomuscio,
T. Lasica,
Wojciech Penczek,
Maciej Szreter:
Verifying Multi-agent Systems via Unbounded Model Checking.
FAABS 2004: 189-212 |
| 2003 |
|---|
| 4 | EE | Agata Pólrola,
Wojciech Penczek,
Maciej Szreter:
Towards Efficient Partition Refinement for Checking Reachability in Timed Automata.
FORMATS 2003: 2-17 |
| 3 | EE | Piotr Dembinski,
Agata Janowska,
Pawel Janowski,
Wojciech Penczek,
Agata Pólrola,
Maciej Szreter,
Bozena Wozna,
Andrzej Zbrzezny:
Verics: A Tool for Verifying Timed Automata and Estelle Specifications.
TACAS 2003: 278-283 |
| 2 | EE | Agata Pólrola,
Wojciech Penczek,
Maciej Szreter:
Reachability Analysis for Timed Automata Using Partitioning Algorithms.
Fundam. Inform. 55(2): 203-221 (2003) |
| 2000 |
|---|
| 1 | | Wojciech Penczek,
Maciej Szreter,
Rob Gerth,
Ruurd Kuiper:
Improving Partial Order Reductions for Universal Branching Time Properties.
Fundam. Inform. 43(1-4): 245-267 (2000) |
