M. Sytrzycki
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1989
1
EE
M. Sytrzycki: Modeling of gate oxide shorts in MOS transistors.
IEEE Trans. on CAD of Integrated Circuits and Systems 8
(3): 193-202 (1989)
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)