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Arvind Sudarsanam

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2005
5 Arvind Sudarsanam, Aravind Dasu: A Fast and Efficient FPGA-Based Implementation for Solving a System of Linear Interval Equations. FPT 2005: 291-292
4EEAravind Dasu, Arvind Sudarsanam: High Level - Application Analysis Techniques & Architectures - To Explore Design possibilities for Reduced Reconfiguration Area Overheads in FPGAs executing Compute Intensive Applications. IPDPS 2005
2004
3 Arvind Sudarsanam, Aravind Dasu, Sethuraman Panchanathan: Task Scheduling of Control-Data Flow Graphs for Reconfigurable Architectures. ERSA 2004: 225-231
2EEArvind Sudarsanam, Mayur Srinivasan, Sethuraman Panchanathan: Resource Estimation and Task Scheduling for Multithreaded Reconfigurable Architectures. ICPADS 2004: 323-
2002
1EEAli Akoglu, Aravind Dasu, Arvind Sudarsanam, Mayur Srinivasan, Sethuraman Panchanathan: Pattern Recognition Tool to Detect Reconfigurable Patterns in MPEG4 Video Processing. IPDPS 2002

Coauthor Index

1Ali Akoglu [1]
2Aravind Dasu [1] [3] [4] [5]
3Sethuraman Panchanathan [1] [2] [3]
4Mayur Srinivasan [1] [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)